The patent document includes an appendix, comprising the first three chapters of, xe2x80x9cXILINX PCI Testbench User""s Guide,xe2x80x9d the contents of which is incorporated by reference into the Detailed Description. The appendix contains material that is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever.
The present invention generally relates to simulation of electronic systems, and more particularly to simulating operation of a communication bus.
Many bus architectures are complicated, and therefore require an advanced simulation environment for testing. Once a design for a system is complete, it is desirable to identify and fix problems by simulating operation of the system before building the actual system. Example simulation tools include Verilog-XL from Cadence and ModelSim from Model Technology.
In addition to a simulation tool, a suitable test bench must be created which is functional with both the system design and with the simulation tool. For some popular bus architectures for which bus core logic is commercially available, a number of vendors provide test benches. The commercially available test benches relieve the user from having to recreate what others have already created.
Simulation scenarios seek to demonstrate compliance with the bus protocol. In addition, some scenarios are constructed to inject behaviors that are not compliant with the bus protocol in order to test a device""s ability to appropriately respond to such error conditions.
Constructing and running various simulation scenarios can be very time consuming, and therefore expensive. For example, complicated sequences of signals must be selectively driven onto the bus at selected times. Furthermore, replication of test scenarios for following generations of devices may involve considerable test bench redesign. Therefore, a system and method that addresses the above identified problems would be desirable.
The present invention provides a method for simulating a communications bus. In one embodiment, the method has the following steps:
(a) instantiating a plurality of bus agents coupled to the bus, wherein the bus agents include a behavioral agent and an application agent;
(b) loading a first bus command into memory space of a selected one of the bus agents, the first bus command indicating a bus operation to be performed involving one or more data phases;
(c) loading phase behavior instructions into memory space of the behavioral agent, at least one of the phase behavior instructions specifying a data phase duration relative to the first bus command;
(d) processing the first command; and
(e) conforming the data phases of the first bus command to the phase behavior instructions.
In another embodiment, the method comprises:
(a) instantiating a behavioral agent and an application agent coupled to the bus;
(b) loading master phase behavior instructions into memory space of the behavioral agent, the master phase behavior instructions including a starting address instruction, an address phase instruction, and one or more data phase instructions. The starting address instruction indicates an address at which to begin the bus transaction, the address phase instruction indicates the bus operation to be performed, and the data phase instructions specify selected signal sequences of the behavioral agent during the respective data phases;
(c) processing the bus command by the behavioral agent; and
(d) conforming the data phases of the behavioral agent to the phase behavior instructions.
In still another embodiment, the method comprises:
(a) instantiating and coupling to the bus a behavioral agent and an application agent;
(b) loading target phase behavior instructions into memory space of the behavioral agent, the target phase behavior instructions including one or more data phase instructions. The data phase instructions specify selected signal sequences of the behavioral agent during the respective data phases;
(c) loading a bus command into memory space of the application agent, and
(d) processing the bus command by the application agent. During processing of the bus command, the data phases of the behavioral agent are conformed to the phase behavior instructions.
According to another aspect of the invention, an arrangement for simulating operation of an electronic system including a communications bus is provided. The arrangement comprises a simulator, a bus, a behavioral agent, an application agent, a simulation control bus, and a simulation controller. The behavioral and application agents are coupled to the bus and hosted by the simulator. The simulation control bus is also coupled to the behavioral and application agents and is hosted by the simulator. The simulation controller is coupled to the simulation control bus and is hosted by the simulator, wherein the simulation controller is configured and arranged to selectively provide bus commands to the behavioral agent and to the application agent. Each bus command indicates a bus operation to be performed and involves one or more data phases, and selectively provides phase behavior instructions to the behavioral agent. The phase behavior instructions respectively specify data phase durations relative to the bus commands.
In another embodiment, the apparatus comprises:
(a) means for configuring a master agent with a bus command, the bus command indicating a bus operation to be performed involving one or more data phases;
(b) means for configuring a behavioral agent with one or more phase behavior instructions, at least one of the phase behavior instructions specifying a data phase duration relative to the first bus command;
(c) means for initiating processing of the bus command by the master agent; and
(d) means for selectively driving selected bus signals in response to parameters in the phase behavior instructions.
The above summary of the present invention is not intended to describe each disclosed embodiment of the present invention. The figures and detailed description that follow provide additional example embodiments and aspects of the present invention. The attached appendix also provides additional information. The term xe2x80x9cphase behavior commandxe2x80x9d used in the appendix is equivalent to the term xe2x80x9cphase behavior instructionxe2x80x9d used herein. For clarity, the term xe2x80x9cinstructionxe2x80x9d used herein was chosen to more clearly distinguish from the terms xe2x80x9cbus commandxe2x80x9d and xe2x80x9csimulation commandxe2x80x9d.